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authorRichard Henderson <richard.henderson@linaro.org>2022-06-08 19:38:56 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-06-08 19:38:56 +0100
commit7d38cb92aad848b9c935588815d0b3a5e157aabb (patch)
tree28f12680f927e4e1edc7fa68e7a13abc136bee22 /python/qemu/utils/accel.py
parentaa4451b60e6a2b1bc4e9a8f6bbf90b266e2a4390 (diff)
downloadfocaccia-qemu-7d38cb92aad848b9c935588815d0b3a5e157aabb.tar.gz
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target/arm: Hoist arm_is_el2_enabled check in sve_exception_el
This check is buried within arm_hcr_el2_eff(), but since we
have to have the explicit check for CPTR_EL2.TZ, we might as
well just check it once at the beginning of the block.

Once this is done, we can test HCR_EL2.{E2H,TGE} directly,
rather than going through arm_hcr_el2_eff().

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220607203306.657998-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'python/qemu/utils/accel.py')
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