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authorFrank Chang <frank.chang@sifive.com>2021-12-10 15:56:47 +0800
committerAlistair Francis <alistair.francis@wdc.com>2021-12-20 14:53:31 +1000
commit900da87ab966654be76cc9c2fb860329cb423bd4 (patch)
treeba975e0bf6a224305e0727e8a15e105b08978a65 /python/qemu/utils/accel.py
parent986c895de17c332c8cb241333dd478cb2ce8b8cc (diff)
downloadfocaccia-qemu-900da87ab966654be76cc9c2fb860329cb423bd4.tar.gz
focaccia-qemu-900da87ab966654be76cc9c2fb860329cb423bd4.zip
target/riscv: rvv-1.0: floating-point/integer type-convert instructions
Add the following instructions:

* vfcvt.rtz.xu.f.v
* vfcvt.rtz.x.f.v

Also adjust GEN_OPFV_TRANS() to accept multiple floating-point rounding
modes.

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20211210075704.23951-62-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/qemu/utils/accel.py')
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