summary refs log tree commit diff stats
path: root/python/qemu/utils/accel.py
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2022-04-08 15:15:40 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-04-22 14:44:53 +0100
commitd7d39749e671b5adde56b9d3b94f4c2f4ce86795 (patch)
tree9663c75500db417fb4b41c083645c843997e5139 /python/qemu/utils/accel.py
parentb76eb5f4dbf9f43b1dcb543111ad983e22670efd (diff)
downloadfocaccia-qemu-d7d39749e671b5adde56b9d3b94f4c2f4ce86795.tar.gz
focaccia-qemu-d7d39749e671b5adde56b9d3b94f4c2f4ce86795.zip
hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()
Implement the function gicv3_redist_process_vlpi(), which was left as
just a stub earlier.  This function deals with being handed a VLPI by
the ITS.  It must set the bit in the pending table.  If the vCPU is
currently resident we must recalculate the highest priority pending
vLPI; otherwise we may need to ring a "doorbell" interrupt to let the
hypervisor know it might want to reschedule the vCPU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220408141550.1271295-32-peter.maydell@linaro.org
Diffstat (limited to 'python/qemu/utils/accel.py')
0 files changed, 0 insertions, 0 deletions