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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2022-07-01 14:22:59 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2022-07-26 10:40:58 -0400 |
| commit | 4a447a710c523392b09391232d5a3dfb156a9d75 (patch) | |
| tree | 55113d0f269d637a1571c42e10683b8d72437ab0 /python/qemu/utils/qemu_ga_client.py | |
| parent | 71a5f07e75ba34072a074181d37009abc28d7083 (diff) | |
| download | focaccia-qemu-4a447a710c523392b09391232d5a3dfb156a9d75.tar.gz focaccia-qemu-4a447a710c523392b09391232d5a3dfb156a9d75.zip | |
hw/i386/pc: Always place CXL Memory Regions after device_memory
Previously broken_reserved_end was taken into account, but Igor Mammedov
identified that this could lead to a clash between potential RAM being
mapped in the region and CXL usage. Hence always add the size of the
device_memory memory region. This only affects the case where the
broken_reserved_end flag was set.
Fixes: 6e4e3ae936e6 ("hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142)")
Reported-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220701132300.2264-3-Jonathan.Cameron@huawei.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'python/qemu/utils/qemu_ga_client.py')
0 files changed, 0 insertions, 0 deletions