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authorPeter Maydell <peter.maydell@linaro.org>2022-07-18 11:01:44 +0100
committerPeter Maydell <peter.maydell@linaro.org>2022-07-26 13:38:23 +0100
commitfca75f60abbf2a7f88264977ff0bb3ff4285989c (patch)
tree8553cbb11bddc23d6972feb481f5ed9dfbfc86a5 /python/qemu/utils/qom_fuse.py
parent02b7035d15726b68bb94f12e2e0d92087da34708 (diff)
downloadfocaccia-qemu-fca75f60abbf2a7f88264977ff0bb3ff4285989c.tar.gz
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target/arm: Add MO_128 entry to pred_esz_masks[]
In commit 7390e0e9ab8475, we added support for SME loads and stores.
Unlike SVE loads and stores, these include handling of 128-bit
elements.  The SME load/store functions call down into the existing
sve_cont_ldst_elements() function, which uses the element size MO_*
value as an index into the pred_esz_masks[] array.  Because this code
path now has to handle MO_128, we need to add an extra element to the
array.

This bug was spotted by Coverity because it meant we were reading off
the end of the array.

Resolves: Coverity CID 1490539, 1490541, 1490543, 1490544, 1490545,
 1490546, 1490548, 1490549, 1490550, 1490551, 1490555, 1490557,
 1490558, 1490560, 1490561, 1490563
Fixes: 7390e0e9ab8475 ("target/arm: Implement SME LD1, ST1")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220718100144.3248052-1-peter.maydell@linaro.org
Diffstat (limited to 'python/qemu/utils/qom_fuse.py')
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