diff options
| author | Zhao Liu <zhao1.liu@intel.com> | 2024-04-24 23:49:18 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-22 19:43:29 +0200 |
| commit | 0f6ed7ba135a45a4a28bddda74d1bf0061174b98 (patch) | |
| tree | 19b5f6e388ee064c8a2c9deb0c7b5285003ddf13 /python/scripts/vendor.py | |
| parent | 6ddeb0ec8c29d51be49d5336c6d6508972b6d49c (diff) | |
| download | focaccia-qemu-0f6ed7ba135a45a4a28bddda74d1bf0061174b98.tar.gz focaccia-qemu-0f6ed7ba135a45a4a28bddda74d1bf0061174b98.zip | |
i386: Split topology types of CPUID[0x1F] from the definitions of CPUID[0xB]
CPUID[0xB] defines SMT, Core and Invalid types, and this leaf is shared by Intel and AMD CPUs. But for extended topology levels, Intel CPU (in CPUID[0x1F]) and AMD CPU (in CPUID[0x80000026]) have the different definitions with different enumeration values. Though CPUID[0x80000026] hasn't been implemented in QEMU, to avoid possible misunderstanding, split topology types of CPUID[0x1F] from the definitions of CPUID[0xB] and introduce CPUID[0x1F]-specific topology types. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Tested-by: Yongwei Ma <yongwei.ma@intel.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Babu Moger <babu.moger@amd.com> Message-ID: <20240424154929.1487382-11-zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python/scripts/vendor.py')
0 files changed, 0 insertions, 0 deletions