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| author | Robert Hoo <robert.hu@linux.intel.com> | 2024-01-12 14:00:41 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-22 15:53:30 +0200 |
| commit | ba6780905943696d790cc880c8e5684b51f027fe (patch) | |
| tree | d6b3e94d97e926c2cae2205bfe5e259cb71ebc9d /python/scripts/vendor.py | |
| parent | a44ea3fa7f2aa1d809fdca1b84a52695b53d8ad0 (diff) | |
| download | focaccia-qemu-ba6780905943696d790cc880c8e5684b51f027fe.tar.gz focaccia-qemu-ba6780905943696d790cc880c8e5684b51f027fe.zip | |
target/i386: add support for LAM in CPUID enumeration
Linear Address Masking (LAM) is a new Intel CPU feature, which allows software to use of the untranslated address bits for metadata. The bit definition: CPUID.(EAX=7,ECX=1):EAX[26] Add CPUID definition for LAM. Note LAM feature is not supported for TCG of target-i386, LAM CPIUD bit will not be added to TCG_7_1_EAX_FEATURES. More info can be found in Intel ISE Chapter "LINEAR ADDRESS MASKING(LAM)" https://cdrdv2.intel.com/v1/dl/getContent/671368 Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> Co-developed-by: Binbin Wu <binbin.wu@linux.intel.com> Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> Tested-by: Xuelian Guo <xuelian.guo@intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-ID: <20240112060042.19925-2-binbin.wu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python/scripts/vendor.py')
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