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authorRichard Henderson <richard.henderson@linaro.org>2023-06-23 11:15:43 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-06-23 11:15:43 +0100
commitaa3cc42c016116615b80359ab4dd8a934339aec5 (patch)
tree4767c7300d6c54013a2564d5a7079daae041aacd /python/scripts
parentb9f335c24705883391ea52035c9b2229e6992eee (diff)
downloadfocaccia-qemu-aa3cc42c016116615b80359ab4dd8a934339aec5.tar.gz
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target/arm: Update SCR and HCR for RME
Define the missing SCR and HCR bits, allow SCR_NSE and {SCR,HCR}_GPF
to be set, and invalidate TLBs when NSE changes.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230620124418.805717-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'python/scripts')
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