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authorClément Léger <cleger@rivosinc.com>2024-04-22 15:58:36 +0200
committerAlistair Francis <alistair.francis@wdc.com>2024-06-03 11:12:11 +1000
commitba7a1c52975a4068573deea4471535567393c366 (patch)
treeb7aeeff13cafd40881f78f4d6769414e7de62212 /python/scripts
parent039003995047b2f7911142c7c5cfb845fda044fd (diff)
downloadfocaccia-qemu-ba7a1c52975a4068573deea4471535567393c366.tar.gz
focaccia-qemu-ba7a1c52975a4068573deea4471535567393c366.zip
target/riscv: change RISCV_EXCP_SEMIHOST exception number to 63
The current semihost exception number (16) is a reserved number (range
[16-17]). The upcoming double trap specification uses that number for
the double trap exception. Since the privileged spec (Table 22) defines
ranges for custom uses change the semihosting exception number to 63
which belongs to the range [48-63] in order to avoid any future
collisions with reserved exception.

Signed-off-by: Clément Léger <cleger@rivosinc.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240422135840.1959967-1-cleger@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python/scripts')
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