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authorPeter Maydell <peter.maydell@linaro.org>2019-04-29 17:35:59 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-04-29 17:35:59 +0100
commit1702071302934af77a072b7ee7c5eadc45b37573 (patch)
tree37f8ea2fe278ed251a409e0858a39574f78e4b72 /python
parent8859ba3c9625e7ceb5599f457a344bcd7c5e112b (diff)
downloadfocaccia-qemu-1702071302934af77a072b7ee7c5eadc45b37573.tar.gz
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target/arm: Clear CONTROL_S.SFPA in SG insn if FPU present
If the floating point extension is present, then the SG instruction
must clear the CONTROL_S.SFPA bit. Implement this.

(On a no-FPU system the bit will always be zero, so we don't need
to make the clearing of the bit conditional on ARM_FEATURE_VFP.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190416125744.27770-8-peter.maydell@linaro.org
Diffstat (limited to 'python')
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