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| author | David Gibson <david@gibson.dropbear.id.au> | 2020-01-06 13:14:16 +1100 |
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| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-03-17 09:41:15 +1100 |
| commit | 5167100975e7888de397456adc1678f65a3dbd59 (patch) | |
| tree | 9528fc0b5000e6f13d7e6f509f14dc69b10f3e79 /python | |
| parent | e8b1144e73544ea6e42f8948d61f6c23312a78c5 (diff) | |
| download | focaccia-qemu-5167100975e7888de397456adc1678f65a3dbd59.tar.gz focaccia-qemu-5167100975e7888de397456adc1678f65a3dbd59.zip | |
target/ppc: Remove RMOR register from POWER9 & POWER10
Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus from POWER7 onwards. However the translation mode which the RMOR controls is no longer supported in POWER9, and so the register has been removed from the architecture. Remove it from our model on POWER9 and POWER10. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org>
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