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authorPalmer Dabbelt <palmer@sifive.com>2019-06-24 01:59:51 -0700
committerPalmer Dabbelt <palmer@sifive.com>2019-06-25 22:32:42 -0700
commit591bddea8d874e1500921de0353818e5586618f5 (patch)
tree89a3ca7210f98e3cdf6bd85ac83c228c87b28262 /python
parent50fba816cd226001bec3e495c39879deb2fa5432 (diff)
downloadfocaccia-qemu-591bddea8d874e1500921de0353818e5586618f5.tar.gz
focaccia-qemu-591bddea8d874e1500921de0353818e5586618f5.zip
RISC-V: Add support for the Zicsr extension
The various CSR instructions have been split out of the base ISA as part
of the ratification process.  This patch adds a Zicsr argument, which
disables all the CSR instructions.

Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'python')
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