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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-04-29 17:35:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-04-29 17:35:58 +0100 |
| commit | ef9aae2522c22c05df17dd898099dd5c3f20d688 (patch) | |
| tree | b4a68ca0b1010286f9644c4991e5c91e074f08ae /python | |
| parent | d33abe82c7c9847284a23e575e1078cccab540b5 (diff) | |
| download | focaccia-qemu-ef9aae2522c22c05df17dd898099dd5c3f20d688.tar.gz focaccia-qemu-ef9aae2522c22c05df17dd898099dd5c3f20d688.zip | |
target/arm: Disable most VFP sysregs for M-profile
The only "system register" that M-profile floating point exposes via the VMRS/VMRS instructions is FPSCR, and it does not have the odd special case for rd==15. Add a check to ensure we only expose FPSCR. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190416125744.27770-5-peter.maydell@linaro.org
Diffstat (limited to 'python')
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