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authorBlue Swirl <blauwirbel@gmail.com>2012-06-24 10:48:56 +0000
committerBlue Swirl <blauwirbel@gmail.com>2012-06-24 10:48:56 +0000
commit4e469a438f40a53dc6217fa5c3d456861b00d80c (patch)
tree3eb0db99ac318738016463b56250da6bdfd64d9e /qemu-log.h
parent959a255dfbe085a47e00fd21c57e87ad4c92719e (diff)
parent960916988b9ec45bb10400d892351f360b4aac96 (diff)
downloadfocaccia-qemu-4e469a438f40a53dc6217fa5c3d456861b00d80c.tar.gz
focaccia-qemu-4e469a438f40a53dc6217fa5c3d456861b00d80c.zip
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf: (72 commits)
  PPC: BookE206: Bump MAS2 to 64bit
  PPC: BookE: Support 32 and 64 bit wide MAS2
  PPC: Extract SPR dump generation into its own function
  PPC: Add e5500 CPU target
  PPC: BookE: Make ivpr selectable by CPU type
  PPC: BookE: Implement EPR SPR
  PPC: Add support for MSR_CM
  PPC: Add some booke SPR defines
  uImage: increase the gzip load size
  PPC: e500: allow users to set the /compatible property via -machine
  dt: make setprop argument static
  PPC: e500: Refactor serial dt generation
  dt: Add global option to set phandle start offset
  PPC: e500: Extend address/size of / to 64bit
  PPC: e500: Define addresses as always 64bit
  PPC: e500: Use new SOC dt format
  PPC: e500: Use new MPIC dt format
  Revert "dt: temporarily disable subtree creation failure check"
  PPC: e500: enable manual loading of dtb blob
  PPC: e500: dt: use target_phys_addr_t for ramsize
  ...
Diffstat (limited to 'qemu-log.h')
-rw-r--r--qemu-log.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/qemu-log.h b/qemu-log.h
index 40f8b7b0c8..2ed19d1578 100644
--- a/qemu-log.h
+++ b/qemu-log.h
@@ -69,7 +69,9 @@ void GCC_FMT_ATTR(2, 3) qemu_log_mask(int mask, const char *fmt, ...);
 /* cpu_dump_state() logging functions: */
 static inline void log_cpu_state(CPUArchState *env1, int flags)
 {
-    cpu_dump_state(env1, qemu_logfile, fprintf, flags);
+    if (qemu_log_enabled()) {
+        cpu_dump_state(env1, qemu_logfile, fprintf, flags);
+    }
 }
 
 static inline void log_cpu_state_mask(int mask, CPUArchState *env1, int flags)