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| author | Marc-André Lureau <marcandre.lureau@redhat.com> | 2025-09-08 12:50:02 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-09-17 19:00:58 +0200 |
| commit | e4444d71e85b5f5ea8311eb59fea3e52f5fc5a14 (patch) | |
| tree | 8f955e1324f0b039540c368db3537f10dcd8796a /rust/hw/timer | |
| parent | b0f6bf8a5b3b3a9dd4a11f792084d39a76b4b007 (diff) | |
| download | focaccia-qemu-e4444d71e85b5f5ea8311eb59fea3e52f5fc5a14.tar.gz focaccia-qemu-e4444d71e85b5f5ea8311eb59fea3e52f5fc5a14.zip | |
rust: re-export qemu macros from common/qom/hwcore
This is just a bit nicer. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Link: https://lore.kernel.org/r/20250827104147.717203-22-marcandre.lureau@redhat.com Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'rust/hw/timer')
| -rw-r--r-- | rust/hw/timer/hpet/Cargo.toml | 1 | ||||
| -rw-r--r-- | rust/hw/timer/hpet/meson.build | 1 | ||||
| -rw-r--r-- | rust/hw/timer/hpet/src/device.rs | 6 |
3 files changed, 3 insertions, 5 deletions
diff --git a/rust/hw/timer/hpet/Cargo.toml b/rust/hw/timer/hpet/Cargo.toml index 08bf97af55..f781b28d8b 100644 --- a/rust/hw/timer/hpet/Cargo.toml +++ b/rust/hw/timer/hpet/Cargo.toml @@ -17,7 +17,6 @@ migration = { path = "../../../migration" } bql = { path = "../../../bql" } qom = { path = "../../../qom" } system = { path = "../../../system" } -qemu_macros = { path = "../../../qemu-macros" } hwcore = { path = "../../../hw/core" } [lints] diff --git a/rust/hw/timer/hpet/meson.build b/rust/hw/timer/hpet/meson.build index 8ab26630d9..b6bb9477f0 100644 --- a/rust/hw/timer/hpet/meson.build +++ b/rust/hw/timer/hpet/meson.build @@ -8,7 +8,6 @@ _libhpet_rs = static_library( util_rs, migration_rs, bql_rs, - qemu_macros, qom_rs, system_rs, hwcore_rs, diff --git a/rust/hw/timer/hpet/src/device.rs b/rust/hw/timer/hpet/src/device.rs index 07e0f639fc..3cfbe9c32b 100644 --- a/rust/hw/timer/hpet/src/device.rs +++ b/rust/hw/timer/hpet/src/device.rs @@ -97,7 +97,7 @@ const HPET_TN_CFG_FSB_CAP_SHIFT: usize = 15; /// Timer N Interrupt Routing Capability (bits 32:63) const HPET_TN_CFG_INT_ROUTE_CAP_SHIFT: usize = 32; -#[derive(qemu_macros::TryInto)] +#[derive(common::TryInto)] #[repr(u64)] #[allow(non_camel_case_types)] /// Timer registers, masked by 0x18 @@ -110,7 +110,7 @@ enum TimerRegister { ROUTE = 16, } -#[derive(qemu_macros::TryInto)] +#[derive(common::TryInto)] #[repr(u64)] #[allow(non_camel_case_types)] /// Global registers @@ -520,7 +520,7 @@ impl HPETTimer { /// HPET Event Timer Block Abstraction #[repr(C)] -#[derive(qemu_macros::Object)] +#[derive(qom::Object)] pub struct HPETState { parent_obj: ParentField<SysBusDevice>, iomem: MemoryRegion, |