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authorPhil Dennis-Jordan <phil@philjordan.eu>2024-11-05 16:57:57 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2024-11-09 08:34:07 +0100
commite3150028fffb808452078ead055fc6a4d50a63e9 (patch)
tree31973992a06a670529e4ba3f64b3666b4de21709 /rust/qemu-api-macros/meson.build
parent0e27f3a5d0cbc0099ba8dcd7ff78e7f80d0c4f15 (diff)
downloadfocaccia-qemu-e3150028fffb808452078ead055fc6a4d50a63e9.tar.gz
focaccia-qemu-e3150028fffb808452078ead055fc6a4d50a63e9.zip
i386/hvf: Fix for UB in handling CPUID function 0xD
The handling for CPUID function 0xD (supported XSAVE features) was
improved in a recent patch. Unfortunately, this appears to have
introduced undefined behaviour for cases where ecx > 30, as the result
of (1 << idx) is undefined if idx > 30.

Per Intel SDM section 13.2, the behaviour for ecx values up to and
including 62 are specified. This change therefore specifically sets
all registers returned by the CPUID instruction to 0 for 63 and higher.
Furthermore, the bit shift uses uint64_t, where behaviour for the entire
range of 2..62 is safe and correct.

Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Link: https://lore.kernel.org/r/20241105155800.5461-3-phil@philjordan.eu
Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'rust/qemu-api-macros/meson.build')
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