summary refs log tree commit diff stats
path: root/rust/qemu-api-macros
diff options
context:
space:
mode:
authorBabu Moger <babu.moger@amd.com>2025-05-08 14:58:00 -0500
committerPaolo Bonzini <pbonzini@redhat.com>2025-05-28 19:35:55 +0200
commit83d940e9700527ff080416ce2fa52ee1f4771d72 (patch)
tree86c179ba1998480f6dbd6ffb2e4f5704c5afe2df /rust/qemu-api-macros
parent397db937e85d7b9f5a6f0b30764786cef09d1ff3 (diff)
downloadfocaccia-qemu-83d940e9700527ff080416ce2fa52ee1f4771d72.tar.gz
focaccia-qemu-83d940e9700527ff080416ce2fa52ee1f4771d72.zip
target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits
Found that some of the cache properties are not set correctly for EPYC models.

l1d_cache.no_invd_sharing should not be true.
l1i_cache.no_invd_sharing should not be true.

L2.self_init should be true.
L2.inclusive should be true.

L3.inclusive should not be true.
L3.no_invd_sharing should be true.

Fix these cache properties.

Also add the missing RAS and SVM features bits on AMD EPYC-Rome. The SVM
feature bits are used in nested guests.

succor		: Software uncorrectable error containment and recovery capability.
overflow-recov	: MCA overflow recovery support.
lbrv		: LBR virtualization
tsc-scale	: MSR based TSC rate control
vmcb-clean	: VMCB clean bits
flushbyasid	: Flush by ASID
pause-filter	: Pause intercept filter
pfthreshold	: PAUSE filter threshold
v-vmsave-vmload	: Virtualized VMLOAD and VMSAVE
vgif		: Virtualized GIF

Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Maksim Davydov <davydov-max@yandex-team.ru>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/8265af72057b84c99ac3a02a5487e32759cc69b1.1746734284.git.babu.moger@amd.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'rust/qemu-api-macros')
0 files changed, 0 insertions, 0 deletions