diff options
| author | Alejandro Jimenez <alejandro.j.jimenez@oracle.com> | 2025-06-17 15:04:24 +0000 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2025-07-14 09:16:40 -0400 |
| commit | 123cf4bdd378f746dfa2f5415ba084148dded3e3 (patch) | |
| tree | 57373e9ce7b9a57edc211785b1235e2328097e50 /rust/qemu-api/src/chardev.rs | |
| parent | 108e10ff69099c3ebe147f505246be7c2ad2a499 (diff) | |
| download | focaccia-qemu-123cf4bdd378f746dfa2f5415ba084148dded3e3.tar.gz focaccia-qemu-123cf4bdd378f746dfa2f5415ba084148dded3e3.zip | |
amd_iommu: Fix mask to retrieve Interrupt Table Root Pointer from DTE
Fix an off-by-one error in the definition of AMDVI_IR_PHYS_ADDR_MASK. The
current definition masks off the most significant bit of the Interrupt Table
Root ptr i.e. it only generates a mask with bits [50:6] set. See the AMD I/O
Virtualization Technology (IOMMU) Specification for the Interrupt Table
Root Pointer[51:6] field in the Device Table Entry format.
Cc: qemu-stable@nongnu.org
Fixes: b44159fe0078 ("x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled")
Signed-off-by: Alejandro Jimenez <alejandro.j.jimenez@oracle.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Message-Id: <20250617150427.20585-6-alejandro.j.jimenez@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'rust/qemu-api/src/chardev.rs')
0 files changed, 0 insertions, 0 deletions