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| author | Paolo Bonzini <pbonzini@redhat.com> | 2025-02-18 13:04:22 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-05-20 08:04:19 +0200 |
| commit | b22cfa0f44e360d09595705cea8c97be692e2080 (patch) | |
| tree | ab32321e22a7edee413bfd38b67c9f1788f25148 /rust/qemu-api/src/timer.rs | |
| parent | 82c81c07e83670befc61333e0bdf3d810e581219 (diff) | |
| download | focaccia-qemu-b22cfa0f44e360d09595705cea8c97be692e2080.tar.gz focaccia-qemu-b22cfa0f44e360d09595705cea8c97be692e2080.zip | |
target/riscv: assert argument to set_satp_mode_max_supported is valid
Check that the argument to set_satp_mode_max_supported is valid for the MXL value of the CPU. It would be a bug in the CPU definition if it weren't. In fact, there is such a bug in riscv_bare_cpu_init(): not just SV64 is not a valid VM mode for 32-bit CPUs, SV64 is not a valid VM mode at all, not yet at least. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'rust/qemu-api/src/timer.rs')
0 files changed, 0 insertions, 0 deletions