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authorPeter Maydell <peter.maydell@linaro.org>2025-02-01 16:39:21 +0000
committerPeter Maydell <peter.maydell@linaro.org>2025-02-11 16:22:07 +0000
commit053b39aad9a94784d5f1926e50ec7199978525a8 (patch)
treec03f405f99f1f5dc66d7c45c4b93a7d2581db266 /rust/qemu-api/src
parent0378199dc2fdf90550f9a819701b0c1709b34eab (diff)
downloadfocaccia-qemu-053b39aad9a94784d5f1926e50ec7199978525a8.tar.gz
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target/arm: Handle FPCR.NEP for BFCVT scalar
Currently we implement BFCVT scalar via do_fp1_scalar().  This works
even though BFCVT is a narrowing operation from 32 to 16 bits,
because we can use write_fp_sreg() for float16. However, FPCR.NEP
support requires that we use write_fp_hreg_merging() for float16
outputs, so we can't continue to borrow the non-narrowing
do_fp1_scalar() function for this. Split out trans_BFCVT_s()
into its own implementation that honours FPCR.NEP.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'rust/qemu-api/src')
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