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| author | Paolo Bonzini <pbonzini@redhat.com> | 2025-04-03 18:20:06 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-04-17 18:23:26 +0200 |
| commit | 5dcdbd071253e249a76c7771bcf78eca3763a131 (patch) | |
| tree | 1311dedfd62b837e21254a977c2788b21e93fe7f /rust/qemu-api/src | |
| parent | 767149d3d078356073a32238b313cee9d02db5d8 (diff) | |
| download | focaccia-qemu-5dcdbd071253e249a76c7771bcf78eca3763a131.tar.gz focaccia-qemu-5dcdbd071253e249a76c7771bcf78eca3763a131.zip | |
target/i386: tcg: use cout to commonize add/adc/sub/sbb cases
Use the carry-out vector as the basis to compute AF, CF and OF. The cost is pretty much the same, because the carry-out is just four boolean operations, and the code is much smaller because add/adc/sub/sbb now share most of it. A similar algorithm to what is used in target/i386/emulate can also be used for APX, in order to build the result of CCMP/CTEST with a new CC_OP_*. CCMP needs to place into the flags from either a subtraction or a constant value; CTEST likewise place into the flags either an AND or a constant value. The new CC_OP for CCMP and CTEST would store for a successful predcate: - in DST and SRC2, the result of the operation; - in SRC, a carry-out vector for CCMP or zero for CTEST; If the default flag value is used, DST/SRC/SRC2 can be filled with constants: - in DST the negated ZF; - in SRC's top 2 bits, a value that results in the desired OF and CF; - in SRC2 a suitable value (any of 0/1/~0/~1) that can be used instead of DST to compute the desired SF and PF. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'rust/qemu-api/src')
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