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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2023-01-31 21:20:11 +0100 |
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| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-02-07 08:19:23 +1000 |
| commit | 95bd8daaafdff905ee4fa0620c097ad4eb2e8a13 (patch) | |
| tree | 97269019e4e6cb76250c828edadbc70c7f75076e /scripts/meson-buildoptions.py | |
| parent | 7ad2878cfd8356e1b9c1097edae367507c182066 (diff) | |
| download | focaccia-qemu-95bd8daaafdff905ee4fa0620c097ad4eb2e8a13.tar.gz focaccia-qemu-95bd8daaafdff905ee4fa0620c097ad4eb2e8a13.zip | |
RISC-V: Add initial support for T-Head C906
This patch adds the T-Head C906 to the list of known CPUs. Selecting this CPUs will automatically enable the available ISA extensions of the CPUs (incl. vendor extensions). Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Message-Id: <20230131202013.2541053-13-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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