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authorAtish Patra <atish.patra@wdc.com>2020-07-01 11:39:46 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-07-13 17:25:37 -0700
commit43cf723adca9a5e188c664c3b606a585192a599c (patch)
treeb9e8397567d10b3a4dc41640dec663b52a77be27 /scripts/performance/dissect.py
parent2c44bbf32cda5fbf85b697e3a12127f59d2c2e80 (diff)
downloadfocaccia-qemu-43cf723adca9a5e188c664c3b606a585192a599c.tar.gz
focaccia-qemu-43cf723adca9a5e188c664c3b606a585192a599c.zip
riscv: Unify Qemu's reset vector code path
Currently, all riscv machines except sifive_u have identical reset vector
code implementations with memory addresses being different for all machines.
They can be easily combined into a single function in common code.

Move it to common function and let all the machines use the common function.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20200701183949.398134-2-atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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