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authorAtish Patra <atish.patra@wdc.com>2020-07-01 11:39:49 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-07-13 17:25:37 -0700
commit8590f53661ec678fd3aa97b4da212b0c00056c2e (patch)
tree66e87eeca2c85d59879dd900e9012f9364097f42 /scripts/performance/dissect.py
parentdc144fe13d336caac2f03b57f1df738e84f984ec (diff)
downloadfocaccia-qemu-8590f53661ec678fd3aa97b4da212b0c00056c2e.tar.gz
focaccia-qemu-8590f53661ec678fd3aa97b4da212b0c00056c2e.zip
RISC-V: Support 64 bit start address
Even though the start address in ROM code is declared as a 64 bit address
for RV64, it can't be used as upper bits are set to zero in ROM code.

Update the ROM code correctly to reflect the 64bit value.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20200701183949.398134-5-atish.patra@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/performance/dissect.py')
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