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authorHalil Pasic <pasic@linux.vnet.ibm.com>2017-09-21 20:08:40 +0200
committerCornelia Huck <cohuck@redhat.com>2017-10-06 10:53:02 +0200
commit62a2554ec2630896d1299e1a282a64c7f3b00da0 (patch)
tree4df6b2fcf1b36f37d94da2b334350c2ab6d03925 /scripts/qapi-commands.py
parentf57ba05823b7c444133f0862077b45824a6a89b5 (diff)
downloadfocaccia-qemu-62a2554ec2630896d1299e1a282a64c7f3b00da0.tar.gz
focaccia-qemu-62a2554ec2630896d1299e1a282a64c7f3b00da0.zip
390x/css: introduce maximum data address checking
The architecture mandates the addresses to be accessed on the first
indirection level (that is, the data addresses without IDA, and the
(M)IDAW addresses with (M)IDA) to be checked against an CCW format
dependent limit maximum address.  If a violation is detected, the storage
access is not to be performed and a channel program check needs to be
generated. As of today, we fail to do this check.

Let us stick even closer to the architecture specification.

Signed-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>
Message-Id: <20170921180841.24490-5-pasic@linux.vnet.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com>
Reviewed-by: Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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