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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
| commit | 8ff41f3995ad2d942ecafb72519c1f09cb811259 (patch) | |
| tree | e45961532999466952bf3b4e4684f0439a111bb4 /scripts/qapi-event.py | |
| parent | d8b1ae4237b5f8cf5037a7f341ff43dc02955256 (diff) | |
| download | focaccia-qemu-8ff41f3995ad2d942ecafb72519c1f09cb811259.tar.gz focaccia-qemu-8ff41f3995ad2d942ecafb72519c1f09cb811259.zip | |
hw/intc/arm_gic_common: Configure IRQs as NS if doing direct NS kernel boot
If we directly boot a kernel in NonSecure on a system where the GIC supports the security extensions then we must cause the GIC to configure its interrupts into group 1 (NonSecure) rather than the usual group 0, and with their initial priority set to the highest NonSecure priority rather than the usual highest Secure priority. Otherwise the guest kernel will be unable to use any interrupts. Implement this behaviour, controlled by a flag which we set if appropriate when the ARM bootloader code calls our ARMLinuxBootIf interface callback. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-4-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'scripts/qapi-event.py')
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