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authorMax Filippov <jcmvbkbc@gmail.com>2012-01-29 05:28:21 +0400
committerMax Filippov <jcmvbkbc@gmail.com>2012-02-20 20:07:12 +0400
commitf14c4b5fb1e2509ad738afe491c099a84ca80749 (patch)
treeea29f0d42d72e406272c7b6854c3bf1b24413fd1 /scripts/qapi-types.py
parent0dc23828f1487a3e587f42a0630dd6879ab8f2bb (diff)
downloadfocaccia-qemu-f14c4b5fb1e2509ad738afe491c099a84ca80749.tar.gz
focaccia-qemu-f14c4b5fb1e2509ad738afe491c099a84ca80749.zip
target-xtensa: add DBREAK data breakpoints
Add DBREAKA/DBREAKC SRs and implement DBREAK breakpoints as debug
watchpoints.

This implementation is not fully compliant to ISA: when a breakpoint is
set to an unmapped/inaccessible memory address it generates TLB/memory
protection exception instead of debug exception.

See ISA, 4.7.7.3, 4.7.7.6 for more details.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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