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authorPeter Maydell <peter.maydell@linaro.org>2014-04-15 19:18:47 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-04-17 21:34:05 +0100
commit00a29f3ddcd506f2fdba4d115e6c8df676f203db (patch)
tree96e1068125cf10201b1d8a0270f67296c476ce79 /scripts/qapi.py
parent85acfa9c38880d5d2b3cc71a5e541a267c9f7396 (diff)
downloadfocaccia-qemu-00a29f3ddcd506f2fdba4d115e6c8df676f203db.tar.gz
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target-arm: Don't expose wildcard ID register definitions for ARMv8
In ARMv8 the 32 bit coprocessor ID register space is tidied up to
remove the wildcarded aliases of the MIDR and the RAZ behaviour
for the unassigned space where crm = 3..7. Make sure we don't
expose thes wildcards for v8 cores. This means we need to have
a specific implementation for REVIDR, an IMPDEF register which
may be the same as the MIDR (and which we always implement as such).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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