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| author | Yongbok Kim <yongbok.kim@imgtec.com> | 2015-10-29 15:18:39 +0000 |
|---|---|---|
| committer | Leon Alrae <leon.alrae@imgtec.com> | 2015-10-30 14:35:52 +0000 |
| commit | b00c72180c36510bf9b124e190bd520e3b7e1358 (patch) | |
| tree | f5a64bd037c0b5577e406da3a7d17f1fc1f5080d /scripts/qapi.py | |
| parent | ca2f6bbbce32b7e1ba4fdaf54165ab0dee47a3a5 (diff) | |
| download | focaccia-qemu-b00c72180c36510bf9b124e190bd520e3b7e1358.tar.gz focaccia-qemu-b00c72180c36510bf9b124e190bd520e3b7e1358.zip | |
target-mips: add PC, XNP reg numbers to RDHWR
Add Performance Counter (4) and XNP (5) register numbers to RDHWR. Add check_hwrena() to simplify access control checkings. Add RDHWR support to microMIPS R6. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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