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| author | Christoffer Dall <christoffer.dall@linaro.org> | 2015-06-02 14:56:23 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-06-02 14:56:25 +0100 |
| commit | bd204e63a7ce9d1b5c5903c9033863b179194989 (patch) | |
| tree | cb5938e63dad2973ddede828ab772086caa24f33 /scripts/qapi.py | |
| parent | dfd90a87155882d92a3efa6da9afc773fd8c6796 (diff) | |
| download | focaccia-qemu-bd204e63a7ce9d1b5c5903c9033863b179194989.tar.gz focaccia-qemu-bd204e63a7ce9d1b5c5903c9033863b179194989.zip | |
target-arm: Add the GICv2m to the virt board
Add a GICv2m device to the virt board to enable MSIs on the generic PCI host controller. We allocate 64 SPIs in the IRQ space for now (this can be increased/decreased later) and map the GICv2m right after the GIC in the memory map. Reviewed-by: Eric Auger <eric.auger@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Message-id: 1432897270-7780-5-git-send-email-christoffer.dall@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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