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| author | Anton Blanchard <antonb@tenstorrent.com> | 2025-04-08 18:39:29 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-05-19 13:38:08 +1000 |
| commit | 3e8d1e4a628bb234c0b5d1ccd510900047181dbd (patch) | |
| tree | 11688c318362e17619dce7158f31a3fc8184632b /scripts/qapi/backend.py | |
| parent | 22b448ccc6611a59d4aa54419f4d88c1f343cb35 (diff) | |
| download | focaccia-qemu-3e8d1e4a628bb234c0b5d1ccd510900047181dbd.tar.gz focaccia-qemu-3e8d1e4a628bb234c0b5d1ccd510900047181dbd.zip | |
target/riscv: rvv: Source vector registers cannot overlap mask register
Add the relevant ISA paragraphs explaining why source (and destination) registers cannot overlap the mask register. Signed-off-by: Anton Blanchard <antonb@tenstorrent.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Max Chou <max.chou@sifive.com> Signed-off-by: Max Chou <max.chou@sifive.com> Message-ID: <20250408103938.3623486-2-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Cc: qemu-stable@nongnu.org
Diffstat (limited to 'scripts/qapi/backend.py')
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