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| author | Max Chou <max.chou@sifive.com> | 2025-04-08 18:39:38 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2025-05-19 13:39:20 +1000 |
| commit | 8539a1244bf240d28917effb88a140eb58e45e88 (patch) | |
| tree | 3dd57f5c70d055332e4bac0bff90ed6f41b686d5 /scripts/qapi/backend.py | |
| parent | db21c3eb05504c4cedaad4f7b19e588361b02385 (diff) | |
| download | focaccia-qemu-8539a1244bf240d28917effb88a140eb58e45e88.tar.gz focaccia-qemu-8539a1244bf240d28917effb88a140eb58e45e88.zip | |
target/riscv: Fix the rvv reserved encoding of unmasked instructions
According to the v spec, the encodings of vcomoress.vm and vector mask-register logical instructions with vm=0 are reserved. Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Max Chou <max.chou@sifive.com> Message-ID: <20250408103938.3623486-11-max.chou@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Cc: qemu-stable@nongnu.org
Diffstat (limited to 'scripts/qapi/backend.py')
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