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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-07-08 20:45:24 +0530 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-07-11 13:43:51 +0100 |
| commit | 7dbfafc157290b52af6109b82b8398d10ef5c3b3 (patch) | |
| tree | e74929c5054c72d53d8cb33df5a338b122d4cc38 /scripts/qapi/commands.py | |
| parent | 598ab0b24c0cb807b3f380ab422915dd6c229026 (diff) | |
| download | focaccia-qemu-7dbfafc157290b52af6109b82b8398d10ef5c3b3.tar.gz focaccia-qemu-7dbfafc157290b52af6109b82b8398d10ef5c3b3.zip | |
target/arm: Implement REVD
This is an SVE instruction that operates using the SVE vector length but that it is present only if SME is implemented. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-30-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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