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| author | Michael Clark <mjc@sifive.com> | 2018-04-10 20:02:46 +1200 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2018-09-04 13:19:31 -0700 |
| commit | d78940ec5d07d3b514f2fd8f941c58118fce2815 (patch) | |
| tree | 784811c909ed01f04daf697027ef9ea0edb1d52b /scripts/qapi/commands.py | |
| parent | c3b03e5800a7151d3c746f40efceabdfdae08f85 (diff) | |
| download | focaccia-qemu-d78940ec5d07d3b514f2fd8f941c58118fce2815.tar.gz focaccia-qemu-d78940ec5d07d3b514f2fd8f941c58118fce2815.zip | |
RISC-V: Use atomic_cmpxchg to update PLIC bitmaps
The PLIC previously used a mutex to protect against concurrent access to the claimed and pending bitfields. Instead of using a mutex, we update the bitfields using atomic_cmpxchg. Rename sifive_plic_num_irqs_pending to sifive_plic_irqs_pending and add an early out if any interrupts are pending as the count of pending interrupts is not used. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/commands.py')
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