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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-03-01 12:04:55 -0800 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-05 15:55:08 +0000 |
| commit | ff730e9666a716b669ac4a8ca7c521177d1d2b15 (patch) | |
| tree | 2e77ada8f7f17180307dda34c33207d087e79dd7 /scripts/qapi/commands.py | |
| parent | cb570bd318beb2ecce83cabf8016dacceb824dce (diff) | |
| download | focaccia-qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.tar.gz focaccia-qemu-ff730e9666a716b669ac4a8ca7c521177d1d2b15.zip | |
target/arm: Split helper_msr_i_pstate into 3
The EL0+UMA check is unique to DAIF. While SPSel had avoided the check by nature of already checking EL >= 1, the other post v8.0 extensions to MSR (imm) allow EL0 and do not require UMA. Avoid the unconditional write to pc and use raise_exception_ra to unwind. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190301200501.16533-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/qapi/commands.py')
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