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| author | Kaiwen Xue <kaiwenx@rivosinc.com> | 2024-07-11 15:31:06 -0700 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-07-18 12:08:44 +1000 |
| commit | 251dccc09af363900436656461151681687e2470 (patch) | |
| tree | 9f6df98a4540502948e184aa918b125fdc4ec3a5 /scripts/qapi/common.py | |
| parent | be470e597708451e6fecb0631728fa759164d03e (diff) | |
| download | focaccia-qemu-251dccc09af363900436656461151681687e2470.tar.gz focaccia-qemu-251dccc09af363900436656461151681687e2470.zip | |
target/riscv: Add cycle & instret privilege mode filtering properties
This adds the properties for ISA extension smcntrpmf. Patches implementing it will follow. Signed-off-by: Kaiwen Xue <kaiwenx@rivosinc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240711-smcntrpmf_v7-v8-3-b7c38ae7b263@rivosinc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/common.py')
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