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| author | Richard Henderson <richard.henderson@linaro.org> | 2022-06-20 10:51:51 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2022-06-27 11:18:17 +0100 |
| commit | d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1 (patch) | |
| tree | 06dcbac7c2a8f79d89252733aee276b1f09fdc24 /scripts/qapi/common.py | |
| parent | de5619887cbc7549bfc63bec4993de94626ccf09 (diff) | |
| download | focaccia-qemu-d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1.tar.gz focaccia-qemu-d5b1223ac1ddf8f706f5e6feaaa526df8287f8b1.zip | |
target/arm: Add SMIDR_EL1, SMPRI_EL1, SMPRIMAP_EL2
Implement the streaming mode identification register, and the two streaming priority registers. For QEMU, they are all RES0. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220620175235.60881-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/qapi/common.py')
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