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| author | Maksim Davydov <davydov-max@yandex-team.ru> | 2023-05-25 00:37:48 +0300 |
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| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-05-25 09:30:52 +0200 |
| commit | fb00aa61267c8b9c57a2d1a1fa1e336d02e3bcd1 (patch) | |
| tree | 39c7a39b8b61124660f7efc4a33cf65f9a60f656 /scripts/qapi/error.py | |
| parent | 886c0453cbf10eebd42a9ccf89c3e46eb389c357 (diff) | |
| download | focaccia-qemu-fb00aa61267c8b9c57a2d1a1fa1e336d02e3bcd1.tar.gz focaccia-qemu-fb00aa61267c8b9c57a2d1a1fa1e336d02e3bcd1.zip | |
target/i386: EPYC-Rome model without XSAVES
Based on the kernel commit "b0563468ee x86/CPU/AMD: Disable XSAVES on AMD family 0x17", host system with EPYC-Rome can clear XSAVES capability bit. In another words, EPYC-Rome host without XSAVES can occur. Thus, we need an EPYC-Rome cpu model (without this feature) that matches the solution of fixing this erratum Signed-off-by: Maksim Davydov <davydov-max@yandex-team.ru> Message-Id: <20230524213748.8918-1-davydov-max@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'scripts/qapi/error.py')
0 files changed, 0 insertions, 0 deletions