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authorPeter Maydell <peter.maydell@linaro.org>2021-08-13 17:11:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-08-25 10:48:49 +0100
commit395b92d50ee2b62b662d5524a61c532a2752336c (patch)
tree9664d635f74e5c49017ebc8da828d3dddd69a2c1 /scripts/qapi/expr.py
parentc1bd78cb06afb37e4043d2b0db000abfecab5fe4 (diff)
downloadfocaccia-qemu-395b92d50ee2b62b662d5524a61c532a2752336c.tar.gz
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target/arm: Implement MVE incrementing/decrementing dup insns
Implement the MVE incrementing/decrementing dup insns VIDUP, VDDUP,
VIWDUP and VDWDUP.  These fill the elements of a vector with
successively incrementing values, starting at the offset specified in
a general purpose register.  The final value of the offset is written
back to this register.  The wrapping variants take a second general
purpose register which specifies the point where the count should
wrap back to 0.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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