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| author | Frank Chang <frank.chang@sifive.com> | 2022-01-18 09:45:16 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2022-01-21 15:52:56 +1000 |
| commit | abe2d74032d6d12a6918715086bbdf8843296f36 (patch) | |
| tree | 457a679ab9977866943aaa0bdb3c27804586c39c /scripts/qapi/expr.py | |
| parent | da61f1256f55a5e9fc03f7c88e3caa425d6bf8cf (diff) | |
| download | focaccia-qemu-abe2d74032d6d12a6918715086bbdf8843296f36.tar.gz focaccia-qemu-abe2d74032d6d12a6918715086bbdf8843296f36.zip | |
target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns
Zve32f extension requires the scalar processor to implement the F extension and implement all vector floating-point instructions for floating-point operands with EEW=32 (i.e., no widening floating-point operations). Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220118014522.13613-14-frank.chang@sifive.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/expr.py')
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