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authorSven Schnelle <svens@stackframe.org>2019-03-11 20:15:52 +0100
committerRichard Henderson <richard.henderson@linaro.org>2019-03-12 09:13:43 -0700
commit43675d20150e65a5a45923a6fcd292e80006dad0 (patch)
treea2e5866abb89ebc2a095df4df949c98fc345960c /scripts/qapi/introspect.py
parentf3b423ec6ee4123fedbb74db517262dd14fa4d73 (diff)
downloadfocaccia-qemu-43675d20150e65a5a45923a6fcd292e80006dad0.tar.gz
focaccia-qemu-43675d20150e65a5a45923a6fcd292e80006dad0.zip
target/hppa: fix overwriting source reg in addb
When one of the source registers is the same as the destination register,
the source register gets overwritten with the destionation value before
do_add_sv() is called, which leads to unexpection condition matches.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190311191602.25796-2-svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'scripts/qapi/introspect.py')
0 files changed, 0 insertions, 0 deletions