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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-05-31 17:27:52 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-06-26 22:32:29 +1000 |
| commit | 190e0ae6290d17780c075ca38b9ecb9895dee419 (patch) | |
| tree | f4857bfe3d2bbab665793ed2b2f9116f4dd1b5b1 /scripts/qapi/parser.py | |
| parent | 15b8ddb18ae0be3f3921cab7169fa562b77227e0 (diff) | |
| download | focaccia-qemu-190e0ae6290d17780c075ca38b9ecb9895dee419.tar.gz focaccia-qemu-190e0ae6290d17780c075ca38b9ecb9895dee419.zip | |
hw/riscv/virt.c: add address-cells in create_fdt_one_aplic()
We need #address-cells properties in all interrupt controllers that are
referred by an interrupt-map [1]. For the RISC-V machine, both PLIC and
APLIC controllers must have this property.
PLIC already sets it in create_fdt_socket_plic(). Set the property for
APLIC in create_fdt_one_aplic().
[1] https://lore.kernel.org/linux-arm-kernel/CAL_JsqJE15D-xXxmELsmuD+JQHZzxGzdXvikChn6KFWqk6NzPw@mail.gmail.com/
Suggested-by: Anup Patel <apatel@ventanamicro.com>
Fixes: e6faee65855b ("hw/riscv: virt: Add optional AIA APLIC support to virt machine")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240531202759.911601-2-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/parser.py')
0 files changed, 0 insertions, 0 deletions