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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-05-31 17:27:59 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-06-26 22:43:38 +1000 |
| commit | f42cdf2ea5b3a1dc369792d7acbf9cd3e5c90815 (patch) | |
| tree | c1a33de2fc139b6411d62fa113b67d5cdf2ea44b /scripts/qapi/parser.py | |
| parent | 8fb0bb5e8a601c66af2f1b5261256451d3d23587 (diff) | |
| download | focaccia-qemu-f42cdf2ea5b3a1dc369792d7acbf9cd3e5c90815.tar.gz focaccia-qemu-f42cdf2ea5b3a1dc369792d7acbf9cd3e5c90815.zip | |
hw/riscv/virt.c: imsics DT: add '#msi-cells'
The DT docs for riscv,imsics [1] requires a 'msi-cell' property. Add one
and set it zero.
[1] Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml
Reported-by: Conor Dooley <conor@kernel.org>
Fixes: 28d8c281200f ("hw/riscv: virt: Add optional AIA IMSIC support to virt machine")
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240531202759.911601-9-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qapi/parser.py')
0 files changed, 0 insertions, 0 deletions