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| author | Simon Veith <sveith@amazon.de> | 2019-12-20 14:03:00 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-12-20 14:03:00 +0000 |
| commit | 41678c33aac61261522b74f08595ccf2221a430a (patch) | |
| tree | 521fbd740874216a22ad9ce8edb6c47bbec4bc8b /scripts/qapi/schema.py | |
| parent | 05ff2fb80ce4ca85d8a39d48ff8156de739b4f51 (diff) | |
| download | focaccia-qemu-41678c33aac61261522b74f08595ccf2221a430a.tar.gz focaccia-qemu-41678c33aac61261522b74f08595ccf2221a430a.zip | |
hw/arm/smmuv3: Align stream table base address to table size
Per the specification, and as observed in hardware, the SMMUv3 aligns the SMMU_STRTAB_BASE address to the size of the table by masking out the respective least significant bits in the ADDR field. Apply this masking logic to our smmu_find_ste() lookup function per the specification. ref. ARM IHI 0070C, section 6.3.23. Signed-off-by: Simon Veith <sveith@amazon.de> Acked-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-id: 1576509312-13083-5-git-send-email-sveith@amazon.de Cc: Eric Auger <eric.auger@redhat.com> Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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