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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-09 16:01:26 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-09 16:01:26 +0100 |
| commit | 500f1f3e81ad112e28b7c979136847e32dad83b6 (patch) | |
| tree | 1cc3274fb14d97bf3d979467181ab200508ee628 /scripts/qapi/schema.py | |
| parent | bd662023e683850c085e98c8ff8297142c2dd9f2 (diff) | |
| parent | 15a2a1a4d1eecc74a87e1552f5cc4e3668375715 (diff) | |
| download | focaccia-qemu-500f1f3e81ad112e28b7c979136847e32dad83b6.tar.gz focaccia-qemu-500f1f3e81ad112e28b7c979136847e32dad83b6.zip | |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210908' into staging
qemu-sparc queue # gpg: Signature made Wed 08 Sep 2021 12:48:40 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-20210908: escc: fix STATUS_SYNC bit in R_STATUS register escc: re-use escc_reset_chn() for soft reset escc: remove register changes from escc_reset_chn() escc: implement hard reset as described in the datasheet escc: implement soft reset as described in the datasheet escc: introduce escc_hard_reset_chn() for hardware reset escc: introduce escc_soft_reset_chn() for software reset escc: reset register values to zero in escc_reset() escc: checkpatch fixes sun4m: fix setting CPU id when more than one CPU is present tcg: Drop gen_io_end() target/sparc: Drop use of gen_io_end() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/qapi/schema.py')
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