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| author | Richard Henderson <richard.henderson@linaro.org> | 2021-05-14 10:13:15 -0500 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2021-05-19 12:15:47 -0500 |
| commit | a77ca425d741b9806a2d15afdc6ed53c85777f8f (patch) | |
| tree | 43c644bb44e08eea5e8d56c0182f8fc2c024e8a7 /scripts/qapi/schema.py | |
| parent | a8b9b657a0825dda1ce0f61f60543b44261239bf (diff) | |
| download | focaccia-qemu-a77ca425d741b9806a2d15afdc6ed53c85777f8f.tar.gz focaccia-qemu-a77ca425d741b9806a2d15afdc6ed53c85777f8f.zip | |
target/i386: Reduce DisasContext.vex_[lv] to uint8_t
Currently, vex_l is either {0,1}; if in the future we implement
AVX-512, the max value will be 2. In vex_v we store a register
number. This is 0-15 for SSE, and 0-31 for AVX-512.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210514151342.384376-24-richard.henderson@linaro.org>
Diffstat (limited to 'scripts/qapi/schema.py')
0 files changed, 0 insertions, 0 deletions