diff options
| author | Paul A. Clarke <pc@us.ibm.com> | 2019-08-21 10:28:41 -0500 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2019-08-29 09:46:07 +1000 |
| commit | 256be7d07a0c1f9d8e2076aa4f7ca4fc048f6838 (patch) | |
| tree | d6b809a78731190fdf6cad9f440a1a104e1b52f8 /scripts/qapi/source.py | |
| parent | 5185a5b6c70ed8d9cc693118c243e5f32ab5094e (diff) | |
| download | focaccia-qemu-256be7d07a0c1f9d8e2076aa4f7ca4fc048f6838.tar.gz focaccia-qemu-256be7d07a0c1f9d8e2076aa4f7ca4fc048f6838.zip | |
ppc: Fix xsmaddmdp and friends
A class of instructions of the form:
op Target,A,B
which operate like:
Target = Target * A + B
have a bit set which distinguishes them from instructions that operate as:
Target = Target * B + A
This bit is not being checked properly (using PPC_BIT macro), so all
instructions in this class are operating incorrectly as the second form
above. The bit was being checked as if it were part of a 64-bit
instruction opcode, rather than a proper 32-bit opcode. Fix by using the
macro (PPC_BIT32) which treats the opcode as a 32-bit quantity.
Fixes: c9f4e4d8b632 ("target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro")
Signed-off-by: Paul A. Clarke <pc@us.ibm.com>
Message-Id: <1566401321-22419-1-git-send-email-pc@us.ibm.com>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Tested-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'scripts/qapi/source.py')
0 files changed, 0 insertions, 0 deletions