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| author | Michael Clark <mjc@sifive.com> | 2018-03-05 13:28:00 +1300 |
|---|---|---|
| committer | Michael Clark <mjc@sifive.com> | 2018-05-06 10:39:38 +1200 |
| commit | 79f86934267135080e13e02b52c74371220d8e06 (patch) | |
| tree | d894040db2c1167178fde60f6c665ef51ce89db9 /scripts/qapi/types.py | |
| parent | 8d196c43d7e247edbda7be7b1597ea184f6b498e (diff) | |
| download | focaccia-qemu-79f86934267135080e13e02b52c74371220d8e06.tar.gz focaccia-qemu-79f86934267135080e13e02b52c74371220d8e06.zip | |
RISC-V: Update E and I extension order
Section 22.8 Subset Naming Convention of the RISC-V ISA Specification defines the canonical order for extensions in the ISA string. It is silent on the position of the E extension however E is a substitute for I so it must come early in the extension list order. A comment is added to state E and I are mutually exclusive, as the E extension will be added to the RISC-V port in the future. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Alistair Francis <Alistair.Francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
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