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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-07-30 16:16:36 +0100 |
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| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-08-25 10:48:50 +0100 |
| commit | e5346292966f5348cd36668f2451ca0e44d820b2 (patch) | |
| tree | 8edd319248d5af1846e528cc6c98f0342a00cdf3 /scripts/qapi/visit.py | |
| parent | fc7a5038a6b70a3e474e58a5ed9845e4f5eed6dd (diff) | |
| download | focaccia-qemu-e5346292966f5348cd36668f2451ca0e44d820b2.tar.gz focaccia-qemu-e5346292966f5348cd36668f2451ca0e44d820b2.zip | |
target/arm: Implement M-profile trapping on division by zero
Unlike A-profile, for M-profile the UDIV and SDIV insns can be configured to raise an exception on division by zero, using the CCR DIV_0_TRP bit. Implement support for setting this bit by making the helper functions raise the appropriate exception. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210730151636.17254-3-peter.maydell@linaro.org
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