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| author | David Gibson <david@gibson.dropbear.id.au> | 2018-03-20 13:01:18 +1100 |
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| committer | David Gibson <david@gibson.dropbear.id.au> | 2018-04-10 10:05:38 +1000 |
| commit | efb7db250adad82c4bb302f0a80e4ae0c641f0d6 (patch) | |
| tree | 1cc846e98c364cf46366a749b00ca621bdd88ade /scripts/qapi | |
| parent | ddd835f32a18c087d3161213f47e89566ce05cc8 (diff) | |
| download | focaccia-qemu-efb7db250adad82c4bb302f0a80e4ae0c641f0d6.tar.gz focaccia-qemu-efb7db250adad82c4bb302f0a80e4ae0c641f0d6.zip | |
target/ppc: Fix backwards migration of msr_mask
21b786f "PowerPC: Add TS bits into msr_mask" added the transaction states to msr_mask for recent POWER CPUs to allow correct migration of machines that are in certain interim transactional memory states. This was correct, but unfortunately breaks backwards of pseries-2.7 and earlier machine types which (stupidly) transferred the msr_mask in the migration stream and failed if it wasn't equal on each end. This works around the problem by masking out the new MSR bits in the compatibility code to send the msr_mask on old machine types. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Greg Kurz <groug@kaod.org> Tested-by: Lukáš Doktor <ldoktor@redhat.com>
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